3.4 Basic Silicon Devices

	In this subchapter 3.4 we look at typical Si devices from two angles:
				First, the very basics of more or less ideal devices are given in rather short notation. This should be a reminder and not something new for you.
				Second, some relevant facts about real devices are presented without much deduction.
	Some of this will be needed and come up again in chapter 8 "Speed".

3.4.1 Junction Diodes

The Ideal Junction Diode

	The ideal - in the sense of most simple - Si junction diode has essentially one major property:
				Its I-U characteristic can be described to a very good approximations by the "simple" pn- junction theory containing the contribution of the space charge layer (otherwise you are not really describing a Si device at all). We had
				j  =  æ ç è e· L· ni 2 t  · NA + e· L· ni 2 t  · ND ö ÷ ø · æ ç è exp – eU kT   – 1 ö ÷ ø +  e · ni · d(U) t æ è exp – eU 2kT   – 1 ö ø
				The major variables are the doping levels N (determining the SCR width d,too), the diffusion length L, (same thing as the life time t, since they are coupled by the Si diffusion constant D, which again is directly connected to the mobility µ of the carriers, which finally is mainly a function of doping), the temperature T, and, of course, the junction voltage U.
	When does this equation break down, i.e. what distinguishes an "ideal " junction diode from a "real " one?
	First, with just that equation, you could increase the voltage to any value you like, and the equation gives some current which might become very large for forward bias, and would stay small for arbitrarily large reverse bias. That is not realistic, of course.
				At large reverse voltages, we have a large electric field in the SCR, and at some point we will just have electrical breakdown since no material can withstand arbitrarily large field strengths. The breakdown mechanism is usually avalanche breakdown.
				Very large forward currents are also not realistic. The real I-U characteristics shown before indicates some reasons. One thing that goes wrong is that our equation does not treat the case of high injection, meaning that the concentration of minority carriers injected into the junction is larger (or at least comparable) to the equilibrium concentration in the bulk. Somewhere in the derivation of the basic diode equation we always made an assumption (hidden or openly) of low injection, so we cannot expect real diodes to behave ideally for large forward currents.
	Second, we have totally neglected the ohmic resistance of the Si.
				Whatever its value Rser might be, it can be seen as being switched in series to the actual diode and thus will reduce the junction voltage Ujunct to
				Ujunct  =  Uex  –  I · Rser
				In other words, we now must distinguish between the external or terminal voltage Uex and the junction voltage Ujunct, and there simply is no way to pass currents larger than Uex/Rser.
	Third, we certainly must have some reservations about the doping in the derivation of the equations, too.
				The concentration N certainly cannot have any value. But limits here are not very important, because for the level of doping achievable in real Si diode, the equation is not too bad.
				More important are gradients in the dopant concentration, i.e. dNAcc/dx because we assumed (implicitly) that N is constant; which it rarely is in real diodes.
	Fourth, we have to be a bit concerned about the temperature.
				The validity of the equation with respect to T-variations is limited: Somewhere we assumed that all dopants are ionized and that the Fermi energy is close to the band edges which will certainly not be true at any temperature..
				In practical terms this means that we are restricted to temperatures not too far off room temperature.
	Fifth and last, we have to consider the diffusion length L.
				While we might worry a bit about the allowable range - is the equation still correct for very large or very small L - the real problem is different:
				Make an ideal diode from Si with L = 200 µm, for example (a regular value), and then make the diode small - lets say you just leave 1 µm of Si to the left and right of the SCR. Since L was the average distance an electron or hole traveled in the Si before death by recombination, we have a problem now. The bulk value of L obviously can no longer summarily describe the perambulation of a minority carrier.
				Looking at it more quantitatively, we must modify the distribution of minority carriers from the edge of the SCR into the bulk of the Si for forward current flow as it was dealt with in subchapter 2.3.4 "Useful Relations" and in subchapter 2.3.5 "Junction Reconsidered". Lets look at this in an advanced module, here we only look at the results.

The Real Junction Diode.

	Lets see summarily what we must change to account for the items 1 - 5 above.
	First we look at intrinsic voltage and current limitations.
				Avalanche breakdown will occur whenever the field strength in the SCR manages to impart enough energy to an electron or hole to generate more carriers in some scattering process. While it is clear that the he field strength in the SCR is mainly a function of doping, it is not so easy to derive numbers.
				There are more breakdown mechanisms than just carrier multiplication by avalanche effects; most important, perhaps is tunneling of carriers through the potential barrier at the junction. Again, high field strengths help.
				Important are the practical limitations in terms of usable reverse voltages (not field strengths per se). The range of admissible reverse voltages is large and reaches from > 1000 V for lightly doped Si, say 1014 cm–3 (and some sophisticated technology) to just a few Volts on the highly doped end - take 1018 cm–3.
				Forward currents in the high injection mode of a real diode will be smaller than predicted by the ideal equation. In a first approximation, we simply have to reduce the slope of the characteristic by a factor of 2 - we have the same slope as in the SCR dominated part at very small forward currents.
				This is what is shown in the curve for a real diode in the picture we used before.
	Second, how about the ohmic resistance?
				It is certainly not negligible in many real diodes and is one of the major problems in solar cells.
				It is, however, easy to address. Just do it yourself in a little exercise.
				Exercise 3.4.1 Current-Voltage characteristics of a solar cell with series and shunt resistance

	Third, we consider doping gradients.
				This is certainly the realistic case, because real diodes are mostly made by diffusing n or p-dopant into a p or n-doped substrate, respectively. At least one side of the diode thus has a doping that varies strongly with the distance from the actual junction (located at the point where ne = np or NDon = NDAcc. Typical profiles are given in the link
				How do doping gradients influence the current-voltage characteristics?
	The surprising answer is: Not much at all! (Take that with a grain of salt)
				The reason is that no matter how you derive the I(U) characteristics, the decisive parts are only the height of energy barriers, and the recombination/generation/diffusion behavior outside the space charge region. The precise shape of the band bending, or the width of the SCR does not enter at all, or at best weakly (in the SCR term via dSCR) in the basic equation from above.
	What will be influenced by doping gradients are: First, (minor) parameters like resistivity and mobility, and second, the SCR properties like its size, and especially its capacitance.
				The first group changes the pre-exponential factor L · ni2/t · Ndop somewhat; essentially you replace the formerly constant Ndop by some kind of average resulting in an effective doping Neff.
				These second set of parameters resulted from solving the Poisson equation, and we have only done this for constant dopant concentration. Redoing the calculations for real dopant profiles must be done numerically. The results for a simple constant gradient of the doping are shown in an advanced module.
	However, the minor effects of doping gradients on the DC (direct current) current-voltage behavior must not induce you to think that doping gradients are unimportant!
				The AC behavior, or, in other words, the speed of the junction, is very much influenced by SCR properties and thus by dopant gradients.
				More to that in chapter 8 "Speed".
	Fourth, a quick glance at temperature effects
				Typical T-specifications for Si devices are 0 oC < T < 70 oC for typical consumer integrated circuits or – 55 oC < T < + 125 oC for somewhat better stuff.
				Pushing technology and materials gives maybe + 160 oC for an admissible operation temperature of Si devices.
	While it is not only the pn-junction that limits the temperature region for applications of more complex devices, you simply must make sure that you have sufficient carriers (i.e. T cannot be too low), but not too many (i.e. carrier concentration must be controlled by doping and not by thermal band-band generation), limiting the upper temperature.
	Fifth and last, how does the size of the device influence its properties?
				There is simple answer for simple (one-dimensional) small diodes: Replace the diffusion length L by a relevant length of the device, e.g. the distance between the edge of the SCR to the ohmic contact dCon in all equations, and concomitantly the life time t by the transit time ttrandefined via
				dCon  =  æ è D · ttran ö ø 1/2
				The justification is given in an advanced module.
				In other words, we equate some relevant length dCon of the device with the average distance that minority carriers travel before they disappear, and ttran is the time they move around.
	This makes not only immediate sense but has far-reaching consequences, as we will see, e.g. in chapter 8. Some major points are listed below:
				The size (together with the mobility) becomes the most important parameter for speed.
				Since vertical dimensions are more easily made small than lateral ones, bipolar devices in a vertical stack are inherently faster than lateral MOS devices. In-diffusion of dopants, e.g., defining the depth of a pn-junction, is easily restricted to 0,1 µm; while it takes very advanced technology to produce lateral structure sizes in this region.
				Leakage currents decrease with decreasing device size.
	One (of several) incentives to make devices ever smaller has its roots right here.

	Well, the long and short of this is that real diodes are quite different from ideal ones - in the details! The global topics stay unchanged, lets recount them quickly:
				Majority and minority carrier dynamic equilibrium in the bulk, controlled by doping, carrier life time and mobility Energy barrier at the junction, resulting in SCR and carrier concentration gradients Very different behavior in reverse and forward direction Forward currents mostly resulting from diffusion currents removing injected minorities Reverse currents mostly resulting from field currents affecting minorities at the edge of the SCR
	In practice, "ideal large" diodes practically do not exist (except in the form of solar cells). Even "small" diodes with graded junctions and the like are not really used if you need a diode (but as part of more complicated devices like MOS transistors). Technical diodes are more sophisticated since they are optimized for specific parameters, e.g. extremely large breakdown voltages. A few examples are
				The PIN diode, short for: p-doped - intrinsic - n-doped. A thin layer, as intrinsic as possible, is sandwiched between doped Si. Good for large forward currents and large reverse voltages. This is the standard form for diodes use for rectifying purposes.
				Tunnel diodes, varactors, fast recovery diodes, Gunn diodes, IMPATT diodes, Zener diodes, solar cells - there is no shortage of names for special diodes and applications going with it. We will, however, not dwell on the subject her (in time, maybe, there might be advanced modules).

© H. Föll (Semiconductor - Script)