5.4.2 Working in Chip Development and Production

Most material scientists and engineers in the Si semiconductor industry will be involved in chip development and production.
They will be part of a large team that also includes colleagues from electrical engineering (design, testing), computer engineering (on-chip software, functionality, testing routines) physicists and chemists and, not to forget, "money" people.
Three major tasks can be distinguished:
1. Development of the next chip generation up to the point where the factory takes over.
2. Improving yield and throughput in the factory for the respective technology (making money!)
3. Introducing new products based on the existing technology.
However, this three fields started to grow together in the late eighties:
Development of new technologies takes place in a factory because pure research and developments "lines " - a cleanroom with the complete infrastructure to process (and characterize) chips - are far too expensive and must produce some sellable product at least "at the side". More important, without a "base load" produced at a constant output and high quality, it is never clear if everything works at the required level of perfection!
Improving the yield (and cutting down the costs) is easily the most demanding job in the field. It is hard work, requires lots of experience and intimate knowledge of the chip and its processes. The experts that developed the chip therefore often are involved in this task, too.
There are not only new products based on the new technology that just vary the design (e.g. different memory types), but constant additions to the technology as well. Most important the "shrink" designs (making the chips smaller) that rely on input from the ongoing development of the next generation and specific processes (e.g. another metallization layer) that need development on their own.
A large degree of interaction therefore is absolutely necessary, demanding flexibility on the part of the engineers involved.
Lets look briefly on the structure and evolution of a big chip project; The development of the 16 Mbit DRAM at the end of the eighties. The project structure may look like this:
Project structure
The number of experts working in a project like this may be 100 - 200; they rely on an infrastructure (e.g. clean room personnel) that counts in the thousands (but these people only spend part of their time for the project).
While there are many tasks that just need to be done on a very high level of sophistication, some tasks involve topics never done before: New technologies (e.g. trench- or stacked capacitor process modules, metallization with chemical-mechanical polishing (CMP , one of the key processes of the nineties), new materials (e.g. silicides in the eighties or Cu in the nineties), new processes (always lithography, or, e.g., plasma etching in the eighties, or electrodeposition in the nineties).
The problem is that nobody knows if these new ingredients will work at all (in a mass production environment) and if they will run at acceptable costs. The only way of finding out is to try it - with very high risks involved.
It is here were you - a top graduate in materials science of a major university - will work after a brief training period of 1 - 2 years.
One big moment in the life of the development team is the so-called "First Silicon".
This means the first chips ever to come out of the line. Will they work - at least a little bit? Or do we have to wait for the next batch, which will be many weeks behind and possibly suffer from the same problems that prevents success with the first one?
Waiting for first Si can be just as nerve racking as waiting for the answer to your job applications, your research proposal or the result of presidential elections (this was written on Nov. 17th in 2000, when 10 days after the election nobody knows if Bush or Gore will be the next president of the USA).
In the link, the results of first Silicon for the16 Mbit DRAM at Siemens are shown, together with how it went on from there.

With frame Back Forward as PDF

© H. Föll (Electronic Materials - Script)