Termine an der TF

Kolloquiumsvortrag (ET&IT), Dr. Andreas Bisplinghoff, Cisco / am 04.12.2017

04.12.2017 von 17:15 bis 18:00

Institute Ostufer, Geb. D, "Aquarium", Kaiserstr. 2, 24143 Kiel

Titel: From Long-Haul to Data-Center-Interconnect - Effiziente Signalverarbeitungsalgorithmen für Flexible Optische Netze

Abstract: First coherent optical communication systems, operating at 40Gbps, have been deployed in 2005. Since then, coherent optical technology has undergone remarkable development in the most recent years. Nowadays, state of the art products support line rates up to 400Gbps per wavelength. Next generation systems will primarily target for higher integration density but will presumably also reach line rates of 600Gbps and beyond.

With progress both in CMOS technology and of optical components, coherent optical transmission continuously pushes forward to highest reach for ultra-long haul applications as well as to highest capacity for shorter reach data-center interconnects. Both directions involve very specific requirements both on the capabilities of applied DSP algorithms and integration density of electrical and optical components.

Each new CMOS technology node facilitates the implementation of more sophisticated DSP algorithms. Many DSP components have undergone tremendous development during the most recent years, enabling coherent systems operating at highest transmission rates. Very efficient equalizer algorithms compensate for linear (CD, PMD) and non-linear (SPM, XPM) signal distortions, enhanced soft-decoded forward error correction schemes improve the noise tolerance, and with probabilistic constellation shaping performance will ultimately approach the Shannon limit.

This talk gives a high-level overview about state of the art DSP algorithms and most recent developments in coherent optical communication. It then discusses the balancing act to address the specific requirements of highest reach as well as highest capacity transmission within a single ASIC. Finally, some selected tradeoffs in algorithm and architecture optimization are shown by means of soft-decoded forward error correction as an example.

Bio: Andreas Bisplinghoff was born in Forchheim in 1984. He received the Dipl.-Ing. and Dr.-Ing. degrees both in electrical and electronic engineering from the Friedrich-Alexander University of Erlangen in 2009 and 2015, respectively.

From 2010 to 2013, he was a Research Assistant with the Institute of Microwaves and Photonics at the University of Erlangen. Since 2013 he has been a Hardware Engineer in Advanced Development with the Cisco Optical GmbH. His research interests include the development of slip-reduced carrier phase recovery techniques and of power-efficient forward error correction schemes for coherent optical communication. Andreas Bisplinghoff has broad experience in complexity-aware algorithm design, FPGA-based prototyping, and power-optimized ASIC implementation.

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